1. Field of the Invention
This invention relates to a semiconductor device and a method of producing the same, and a lead frame and a mounting board therefor. More particularly, it relates to a plastic-molded-type semiconductor device suitable for high-density packaging and a method of producing the same, as well as a mounting board which is a printed circuit board for mounting such a device, a semiconductor device including semiconductor device packages combined with each other, and a lead frame used in a semiconductor device.
2. Description of the Related Art
The conventional package of a semiconductor device has mainly been a package in which leads are arranged in its sides. This package has an advantage that it is low in the production cost, but has a disadvantage arising from the fact that the leads are arranged one-dimensionally. Since the number of leads is in proportion to the package size, there has been the disadvantage that a size of the package must be made larger as the number of leads is increased, so that the high-density mounting performed by way of multi-pins has been limited.
As a package which is suitable in achievement of multi-pins in order to overcome the above disadvantage, a pin-grid-array type semiconductor device has been put to practical use. This package is provided with two-dimensionally arranged pins of a lattice configuration on the underside of the package to achieve multi-pins.
However, this package necessitates the machining of through-holes in a printed circuit board to be mounted which adds to the cost in the production thereof. It has also the disadvantage that it requires a fine pin pitch.
In a further development thereof, a structure has been proposed in which electrodes are two-dimensionally arranged on the package surface that can be directly soldered onto a printed circuit board. Such developments have been disclosed in Japanese Patent Unexamined Publication Nos. 62-147751, 1-105566, 1-244655 and 3-94459, etc.
Of the afore-mentioned prior techniques, the package disclosed in Japanese Patent Unexamined Publication No. 62-147751 makes use of a small hole which is bored from the lower surface of a plastic-molded encapsulated package to the lower side of a lead. This package has a structure that outer electro-conductive connection is achieved by filling a solder in the small hole, and this structure appears to have the most materiality.
In the afore-mentioned prior arts, a concrete structure including a method of connecting a semiconductor chip to electrodes on the package surface has not been studied, and hence none has been put to practical use.
In an example described in Japanese Patent Unexamined Publication No. 62-147751, it is not studied how to form a small hole, especially a method suitable for mass production and further the technique of connecting the leads to a solder are not studied therein.